NIST UNIVERSITY
Institute Park, Berhampur, Odisha-761008, India

DIGITAL VLSI DESIGN

Course Description

It covers the complete design flow from device fundamentals to circuit implementation and testing strategies. Students will gain a strong understanding of MOS transistor operation, digital circuit design techniques, layout methodologies, and design-for-testability concepts essential for modern chip design.

Course Modules

Module 1: Introduction and MOS Transistor 12 Hours

Overview of IC technology, classification of IC processes, VLSI design challenges and flow, design hierarchy, regularity, modularity, and locality. Study of VLSI design styles, CMOS fabrication process (n-well and p-well), layout design rules, stick diagrams, and mask layout concepts. MOS transistor fundamentals — MOS system under bias, structure and operation, I–V characteristics, SPICE modelling, MOSFET scaling, and capacitance effects.

Module 2: Static Characteristics and MOS Inverters – Switching Characteristics and Interconnect Effects 12 Hours

Static characteristics of MOS inverters: resistive-load, enhancement-load, depletion-load, and CMOS inverters. Switching characteristics and interconnect effects — delay time definitions, delay calculations, inverter design with delay constraints, and CMOS switching power dissipation.

Module 3: Combinational MOS Logic Circuits 8 Hours

Design and layout of CMOS combinational logic circuits — complex logic gates, AOI and OAI gates, pseudo-nMOS logic, full adder circuits, CMOS transmission gates, pass-transistor logic, complementary pass-transistor logic (CPL), and power dissipation considerations.

Module 4: Sequential MOS Logic Circuits 6 Hours

Design of sequential logic circuits using MOS technology — static and dynamic latches, registers, timing and clocking strategies, pipelining concepts, and implementation of clocked latches and flip-flops, including CMOS D-latch.

Module 5: Design for Testability 6 Hours

Introduction to design-for-testability concepts. Fault types and models, controllability and observability, scan-based techniques, and built-in self-test (BIST) methods including pseudo-random pattern generation, LFSR, output response analysis, and IDDQ current monitoring tests.

Textbooks and References

Prescribed Textbooks

  • Sung-Mo Kang, Yusuf Leblebici, and Chul Woo Kim, CMOS Digital Integrated Circuits: Analysis and Design, 4th Edition, Tata McGraw-Hill, 2015.
  • Debaprasad Das, VLSI Design, 2nd Edition, Oxford University Press, 2015.

Reference Books

  • Neil H. E. Weste, David Harris, and Ayan Banerjee, CMOS VLSI Design: A Circuits and Systems Perspective, 4th Edition, Pearson Education, 2015.
  • Jan M. Rabaey, Anantha Chandrakasan, and Borivoje Nikolic, Digital Integrated Circuits — A Design Perspective, 2nd Edition, PHI Learning, 2016.
  • Wayne Wolf, Modern VLSI Design: System-on-Chip Design, 3rd Edition, PHI Learning, 2016.
  • John P. Uyemura, CMOS Logic Circuit Design, 1st Edition, Springer, 2007.

Course Instructors

Prof. Mitu Baral

Prof. Mitu Baral

Senior Assistant Professor, School of Engineering (Electronics and Communication Engineering)

mitubaral@nist.edu

Faculty Web Page
Prof. (Dr.) P. Rajesh Kumar

Prof. (Dr.) P. Rajesh Kumar

Professor & Dean of Academics, Department of Electronics and Communication Engineering

rkpanakala@nist.edu

Faculty Web Page
Dr. Rajesh Kumar Patjoshi

Dr. Rajesh Kumar Patjoshi

Associate Professor and Head of Department, School of Engineering (Electronics and Communication Engineering)

rajeshpatjoshi1@nist.edu

Faculty Web Page

Syllabus and Course Details

Syllabus: PDF Link

Time and Place: TIFAC Conference room

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